![[ICO]](/icons/blank.gif){kind=icon}
![[PARENTDIR]](/icons/back.gif){kind=icon}
![[ ]](/icons/compressed.gif){kind=icon}
![[TXT]](/icons/text.gif){kind=icon}
| Name | Last modified | Size | Description |
|---|---|---|---|---|
| Parent Directory | - | ||
| HLS_sources-05.01.2017.tar.gz | 2017-02-03 23:48 | 1.7M | |
| README.txt | 2015-05-04 11:57 | 236 | |
| qpsk_mapper_freq_interleaver_s6.zip | 2015-05-04 11:47 | 523K | |
| pre_fft_preorder_converter1536_2048_s6.zip | 2015-05-04 11:47 | 896K | |
| dqpsk_prbs_null2_s6.zip | 2015-05-04 11:47 | 911K | |
| input_interface_s6.zip | 2015-05-04 11:46 | 119K | |
| gain_control_s6.zip | 2015-05-04 11:46 | 2.9M | |
| LICENSE.txt | 2015-05-04 11:09 | 954 | |
Please take a note, that testing applications are not producing proper results, since actual logic source code has been changed multiple times. So running C simulation may fail. But running C Synthesis and exporting RTL are works fine.